Sensor-based anomaly detection deployed at scale in semiconductor manufacturing

Abstract

The complexity of semiconductor manufacturing needs anomaly detection frameworks capable of real-time, scalable and interpretable process monitoring. The thesis introduces a Deep Learning (DL) based anomaly detection system tailored for semiconductor batch processes, using 1D Convolutional AutoEncoders (1D-CAE) to preserve temporal integrity, enhance interpretability through reconstruction error decomposition and operate at scale with minimal engineering cost of ownership during deployment.

Unlike conventional approaches that require extensive feature engineering or selection and suffer from information loss, the proposed methodology directly models raw time-series sensor data, effectively capturing high-dimensional, multi-modal process behaviours. Novel semiconductor datasets reflecting real-world process variability are curated and used to benchmark the framework against established public datasets, demonstrating superior anomaly detection accuracy. The system employs an automated Keras hyperband optimisation strategy to configure network architectures dynamically, ensuring adaptability to diverse semiconductor equipment and process conditions.

This thesis demonstrates the feasibility of deploying 1,433 models across 274,277 process configurations in a distributed semiconductor manufacturing environment at two wafer fabrication sites. The deployment framework incorporates a machine learning operations (MLOps) pipeline for automated model orchestration and real-time inference, achieving an average of 1.3 seconds per model inference and a total inference pipeline execution time of ~80 seconds, enabling low-latency, high-throughput monitoring. Experimental results show a median anomaly detection rate of 1.26%, indicating strong performance across diverse manufacturing conditions and equipment.

The approach connects research with industrial semiconductor applications, offering a scalable, interpretable, low-latency solution for improved process stability, predictive maintenance and operational efficiency, thereby providing a framework for deploying DL quality control systems in high-precision semiconductor manufacturing.

Thesis is embargoed until 30th June 2027

Date of Award	Jun 2025
Original language	English
Sponsors	Seagate Technology
Supervisor	Liam Maguire (Supervisor), Damien Coyle (Supervisor) & Xuemei Ding (Supervisor)