System-Level Design Space Exploration

B Sharat Chandra Varma, Kolin Paul, M Balakrishnan

Research output: Chapter in Book/Report/Conference proceedingChapter


In this chapter, we discuss the design space exploration carried out to accelerate de novo genome assembly using FPGAs. It is well known that as systems become more complex, one moves up the abstraction level for design space exploration through simulation. This is essential for managing complexity. Normally, higher abstraction levels imply faster and wider design space exploration but come at the price of lower accuracy. The focus of this chapter is on high-level design space exploration. The exploration was carried out at three levels. In this chapter, we propose modeling at three different levels: high-level algorithm model using ‘C’ followed by cycle-accurate model using System-C, and finally RTL component model using VHDL. We classify the parameters that can be studied using these three models.
Original languageEnglish
Title of host publicationArchitecture Exploration of FPGA Based Accelerators for BioInformatics Applications
Number of pages16
ISBN (Electronic)978-981-10-0591-6
ISBN (Print)978-981-10-0589-3
Publication statusPublished (in print/issue) - 3 Mar 2016


  • Processing Element
  • Clock Cycle
  • Critical Path
  • Hardware Implementation
  • Performance Number


Dive into the research topics of 'System-Level Design Space Exploration'. Together they form a unique fingerprint.

Cite this