System-Level Design Space Exploration

In this chapter, we discuss the design space exploration carried out to accelerate de novo genome assembly using FPGAs. It is well known that as systems become more complex, one moves up the abstraction level for design space exploration through simulation. This is essential for managing complexity. Normally, higher abstraction levels imply faster and wider design space exploration but come at the price of lower accuracy. The focus of this chapter is on high-level design space exploration. The exploration was carried out at three levels. In this chapter, we propose modeling at three different levels: high-level algorithm model using ‘C’ followed by cycle-accurate model using System-C, and finally RTL component model using VHDL. We classify the parameters that can be studied using these three models.