Smart Watchdog for RISC-V: A Novel Spiking Neural Network Approach to Fault Detection

David Simpson; Jim Harkin; Malachy McElholm; Liam McDaid

doi:10.1109/TCSII.2025.3583042

Smart Watchdog for RISC-V: A Novel Spiking Neural Network Approach to Fault Detection

Research output: Contribution to journal › Article › peer-review

23 Downloads (Pure)

Abstract

Watchdog mechanisms must detect permanent and transient faults with minimal power and area overheads, but their own reliability is vital, as failures can jeopardize system integrity. This brief introduces a novel smart watchdog paradigm based on spiking neural networks (SNNs), where SNNs have previously been demonstrated to offer low-power and area-efficient solutions. The proposed smart watchdog is trained to monitor control flow at the execute stage of an example RISC-V processor, achieving a high fault coverage of 98%, independent of the software application executed. Notably, it detects faults that go unnoticed by the RISC-V processor’s existing trap handler. An FPGA-based implementation validates the smart watchdog’s in-circuit fault detection capabilities when integrated with a RISC-V processor. An extended discussion explores control flow and feature extraction in the RISC-V architecture, and also evaluates the practical implementation of a SNN-based approach.

Original language	English
Pages (from-to)	1877-1881
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	72
Issue number	12
Early online date	25 Jun 2025
DOIs	https://doi.org/10.1109/TCSII.2025.3583042
Publication status	Published (in print/issue) - 1 Dec 2025

Bibliographical note

Publisher Copyright:
© 2004-2012 IEEE.

Funding

This work was supported by the Department for the Economy (DfE) Ph.D. Scholarship.

Funders
Department for the Economy

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 9 Industry, Innovation, and Infrastructure
SDG 11 Sustainable Cities and Communities

Keywords

Embedded processors
Fault detection
Neuromorphic
RISC-V
Spiking neural network
Watchdog
watchdog
fault detection
spiking neural network
neuromorphic

Access to Document

10.1109/TCSII.2025.3583042

TCAS II Paper Accepted SubmissionAuthor Accepted Manuscript, 569 KBLicence: CC BY

Cite this

@article{ef187a95d4fc410b82985a6268b1d48a,

title = "Smart Watchdog for RISC-V: A Novel Spiking Neural Network Approach to Fault Detection",

abstract = "Watchdog mechanisms must detect permanent and transient faults with minimal power and area overheads, but their own reliability is vital, as failures can jeopardize system integrity. This brief introduces a novel smart watchdog paradigm based on spiking neural networks (SNNs), where SNNs have previously been demonstrated to offer low-power and area-efficient solutions. The proposed smart watchdog is trained to monitor control flow at the execute stage of an example RISC-V processor, achieving a high fault coverage of 98\%, independent of the software application executed. Notably, it detects faults that go unnoticed by the RISC-V processor{\textquoteright}s existing trap handler. An FPGA-based implementation validates the smart watchdog{\textquoteright}s in-circuit fault detection capabilities when integrated with a RISC-V processor. An extended discussion explores control flow and feature extraction in the RISC-V architecture, and also evaluates the practical implementation of a SNN-based approach.",

keywords = "Embedded processors, Fault detection, Neuromorphic, RISC-V, Spiking neural network, Watchdog, watchdog, fault detection, spiking neural network, neuromorphic",

author = "David Simpson and Jim Harkin and Malachy McElholm and Liam McDaid",

note = "Publisher Copyright: {\textcopyright} 2004-2012 IEEE.",

year = "2025",

month = dec,

day = "1",

doi = "10.1109/TCSII.2025.3583042",

language = "English",

volume = "72",

pages = "1877--1881",

number = "12",

}

TY - JOUR

T1 - Smart Watchdog for RISC-V: A Novel Spiking Neural Network Approach to Fault Detection

AU - Simpson, David

AU - Harkin, Jim

AU - McElholm, Malachy

AU - McDaid, Liam

PY - 2025/12/1

Y1 - 2025/12/1

N2 - Watchdog mechanisms must detect permanent and transient faults with minimal power and area overheads, but their own reliability is vital, as failures can jeopardize system integrity. This brief introduces a novel smart watchdog paradigm based on spiking neural networks (SNNs), where SNNs have previously been demonstrated to offer low-power and area-efficient solutions. The proposed smart watchdog is trained to monitor control flow at the execute stage of an example RISC-V processor, achieving a high fault coverage of 98%, independent of the software application executed. Notably, it detects faults that go unnoticed by the RISC-V processor’s existing trap handler. An FPGA-based implementation validates the smart watchdog’s in-circuit fault detection capabilities when integrated with a RISC-V processor. An extended discussion explores control flow and feature extraction in the RISC-V architecture, and also evaluates the practical implementation of a SNN-based approach.

AB - Watchdog mechanisms must detect permanent and transient faults with minimal power and area overheads, but their own reliability is vital, as failures can jeopardize system integrity. This brief introduces a novel smart watchdog paradigm based on spiking neural networks (SNNs), where SNNs have previously been demonstrated to offer low-power and area-efficient solutions. The proposed smart watchdog is trained to monitor control flow at the execute stage of an example RISC-V processor, achieving a high fault coverage of 98%, independent of the software application executed. Notably, it detects faults that go unnoticed by the RISC-V processor’s existing trap handler. An FPGA-based implementation validates the smart watchdog’s in-circuit fault detection capabilities when integrated with a RISC-V processor. An extended discussion explores control flow and feature extraction in the RISC-V architecture, and also evaluates the practical implementation of a SNN-based approach.

KW - Embedded processors

KW - Fault detection

KW - Neuromorphic

KW - RISC-V

KW - Spiking neural network

KW - Watchdog

KW - watchdog

KW - fault detection

KW - spiking neural network

KW - neuromorphic

UR - https://www.scopus.com/pages/publications/105009358593

U2 - 10.1109/TCSII.2025.3583042

DO - 10.1109/TCSII.2025.3583042

M3 - Article

VL - 72

SP - 1877

EP - 1881

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

IS - 12

ER -

Smart Watchdog for RISC-V: A Novel Spiking Neural Network Approach to Fault Detection

Abstract

Bibliographical note

Funding

UN SDGs

Keywords

Access to Document

Other files and links

Fingerprint

Cite this