Silicon-Based Dynamic Synapse With Depressing Response

Thomas Dowrick, Steve Hall, Liam McDaid

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

A compact implementation of a dynamic charge transfer synapse cell, capable of implementing synaptic depression, is presented. The cell is combined with a simple current mirror summing node to produce biologically plausible postsynaptic potentials (PSPs). A single charge packet is effectively transferred from the synapse to the summing node, whenever a presynaptic pulse is applied to one of its terminals. The charge packet is “weighted” by a voltage applied to the secondterminal of the synapse. A voltage applied to the third terminal determines the charge recovery time in the synapse, which can be adjusted over several orders of magnitude. This voltagedetermines the paired pulse ratio for the synapse. The fall time of the PSP is also adjustable and is set by the gate voltage of a metal–oxide–semiconductor field-effect transistor operatingin subthreshold. Results extracted from chips fabricated in a 0.35-μm complementary metal–oxide–semiconductor process, alongside theoretical and simulation results, confirm the abilityof the cell to produce PSPs that are characteristic of real synapses. The concept addresses a key requirement for scalable hardware neural networks.
LanguageEnglish
Pages1513-1525
JournalIEEE Transactions on Neural Networks and Learning Systems
Volume23
Issue number10
DOIs
Publication statusPublished - 10 Oct 2012

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synapses
silicon
electric potential
cells
pulses
metal oxide semiconductors
CMOS
hardware
field effect transistors
recovery
chips
charge transfer
mirrors
requirements

Cite this

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Silicon-Based Dynamic Synapse With Depressing Response. / Dowrick, Thomas; Hall, Steve; McDaid, Liam.

In: IEEE Transactions on Neural Networks and Learning Systems, Vol. 23, No. 10, 10.10.2012, p. 1513-1525.

Research output: Contribution to journalArticle

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