Si elegans: FPGA Hardware Emulation of C. elegans Nematode Nervous System

For many decades neuroscience researchers have been interested in harnessing the computational power of the mammalian nervous system. However, the vast complexity of such a nervous system has made it very difficult to fully understand basic functions such as movement, touch and learning. More recently the nervous system of the C. elegans nematode has been widely studied and there now exists a vast wealth of biological knowledge about its nervous structure, function and connectivity. The Si elegans project aims to develop a Hardware Neural Network (HNN) to accurately replicate the C. elegans nervous system behavior to enable neuroscientists to better understand these basic functions. Replication of the C. elegans biological system requires powerful computing technologies, based on parallel processing, for real-time computation. The Si elegans project will use FPGAs due to their advanced programmable features that allow reconfigurability, high performance parallel processing and relatively low price per programmable logic element. Furthermore, the project will deliver an open-access framework that will be available via a Web Portal to neuroscientists, biologists, clinicians and engineers. In this paper an overview of the complete hardware system required to fully realize Si elegans is presented along with an early small scale implementation of the hardware system. Keywords: Si elegans, Field Programmable Gate Array (FPGA), Hardware Neural Network (HNN), Spiking Neural Networks (SNN), C. elegans.