Self-Repairing Hardware with Astrocyte-Neuron Networks

Junxiu Liu; Jim Harkin; Liam Maguire; LJ McDaid; John Wade; W McElholm

doi:10.1109/ISCAS.2016.7527499

Self-Repairing Hardware with Astrocyte-Neuron Networks

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Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

21 Citations (Scopus)

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Abstract

A Self-rePAiring spiking Neural NEtwoRk(SPANNER) hardware architecture is presented in this paper. Itis based on a software model of an astrocyte-neuron networkwhich previously demonstrated the ability to self-detect faultsand self-repair autonomously. Experimental results in this papershow that when faults occur at the synapse, remaining healthysynapses of the same neuron are enhanced by the feedback fromthe astrocyte, which enables the system functionality to bemaintained. This is the first time that astrocytes cells mergedwithin spiking neurons demonstrate a self-repairing capability inhardware. This achieves a much more fine-grained repaircapability in hardware compared to the conventional faulttolerance techniques.

Original language	English
Title of host publication	Unknown Host Publication
Publisher	IEEE
Pages	1350-1353
Number of pages	4
ISBN (Print)	978-1-4799-5340-0
DOIs	https://doi.org/10.1109/ISCAS.2016.7527499
Publication status	Published online - 11 Aug 2016
Event	IEEE International Symposium on Circuits and Systems (ISCAS) - Canada Duration: 11 Aug 2016 → …

Conference

Conference	IEEE International Symposium on Circuits and Systems (ISCAS)
Period	11/08/16 → …

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 3 Good Health and Well-being
SDG 9 Industry, Innovation, and Infrastructure

Keywords

Astrocyte
spiking neural networks
fault tolerance
FPGAs
repair

Access to Document

10.1109/ISCAS.2016.7527499

AstrocyteHw ISCAS2016Author Accepted Manuscript, 467 KB

Self-correcting strategy for networks-on-chip interconnect
Liu, J. (Author), Harkin, J. (Supervisor), Li, Y. (Supervisor) & Maguire, L. (Supervisor), Sept 2015
Student thesis: Doctoral Thesis

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Cite this

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title = "Self-Repairing Hardware with Astrocyte-Neuron Networks",

abstract = "A Self-rePAiring spiking Neural NEtwoRk(SPANNER) hardware architecture is presented in this paper. Itis based on a software model of an astrocyte-neuron networkwhich previously demonstrated the ability to self-detect faultsand self-repair autonomously. Experimental results in this papershow that when faults occur at the synapse, remaining healthysynapses of the same neuron are enhanced by the feedback fromthe astrocyte, which enables the system functionality to bemaintained. This is the first time that astrocytes cells mergedwithin spiking neurons demonstrate a self-repairing capability inhardware. This achieves a much more fine-grained repaircapability in hardware compared to the conventional faulttolerance techniques.",

keywords = "Astrocyte, spiking neural networks, fault tolerance, FPGAs, repair",

author = "Junxiu Liu and Jim Harkin and Liam Maguire and LJ McDaid and John Wade and W McElholm",

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T1 - Self-Repairing Hardware with Astrocyte-Neuron Networks

AU - Liu, Junxiu

AU - Harkin, Jim

AU - Maguire, Liam

AU - McDaid, LJ

AU - Wade, John

AU - McElholm, W

PY - 2016/8/11

Y1 - 2016/8/11

N2 - A Self-rePAiring spiking Neural NEtwoRk(SPANNER) hardware architecture is presented in this paper. Itis based on a software model of an astrocyte-neuron networkwhich previously demonstrated the ability to self-detect faultsand self-repair autonomously. Experimental results in this papershow that when faults occur at the synapse, remaining healthysynapses of the same neuron are enhanced by the feedback fromthe astrocyte, which enables the system functionality to bemaintained. This is the first time that astrocytes cells mergedwithin spiking neurons demonstrate a self-repairing capability inhardware. This achieves a much more fine-grained repaircapability in hardware compared to the conventional faulttolerance techniques.

AB - A Self-rePAiring spiking Neural NEtwoRk(SPANNER) hardware architecture is presented in this paper. Itis based on a software model of an astrocyte-neuron networkwhich previously demonstrated the ability to self-detect faultsand self-repair autonomously. Experimental results in this papershow that when faults occur at the synapse, remaining healthysynapses of the same neuron are enhanced by the feedback fromthe astrocyte, which enables the system functionality to bemaintained. This is the first time that astrocytes cells mergedwithin spiking neurons demonstrate a self-repairing capability inhardware. This achieves a much more fine-grained repaircapability in hardware compared to the conventional faulttolerance techniques.

KW - Astrocyte

KW - spiking neural networks

KW - fault tolerance

KW - FPGAs

KW - repair

U2 - 10.1109/ISCAS.2016.7527499

DO - 10.1109/ISCAS.2016.7527499

M3 - Conference contribution

SN - 978-1-4799-5340-0

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BT - Unknown Host Publication

PB - IEEE

T2 - IEEE International Symposium on Circuits and Systems (ISCAS)

Y2 - 11 August 2016

ER -

Self-Repairing Hardware with Astrocyte-Neuron Networks

Abstract

Conference

UN SDGs

Keywords

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Student theses

Self-correcting strategy for networks-on-chip interconnect

Cite this