Scalable Networks-on-Chip Interconnected Architecture for Astrocyte-Neuron Networks

Research output: Contribution to journalArticle

22 Citations (Scopus)
18 Downloads (Pure)
Original languageEnglish
Pages (from-to)2290-2303
JournalIEEE Transactions on Circuits and Systems I: Regular Papers.
Volume63
Issue number12
DOIs
Publication statusPublished - 23 Nov 2016

Keywords

  • Spiking neural networks
  • astrocyte
  • networks-on-chip
  • hierarchical
  • self-repair
  • fault tolerance
  • FPGA.

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