Novel mapping of a linear QR architecture

G Lightbody; R Walke; R Woods; J McCanny

doi:10.1109/ICASSP.1999.758303

Novel mapping of a linear QR architecture

G Lightbody, R Walke, R Woods, J McCanny

Faculty Of Computing, Eng. & Built Env.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Citations (Scopus)

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Abstract

This paper presents a novel architecture mapping technique which was essential in the design of a QR array which forms the core processor of a single chip adaptive beamforming system. The mapping technique assigns a QR triangular array of 2m2+3m+1 cells down onto a linear architecture of m+1 processors. The mapping results in a linear systolic architecture with one hundred percent hardware utilisation, local interconnects and individual processors for boundary and internal cell operations. In addition, this paper highlights the effect latency has on the validity of the linear architecture

Original language	English
Title of host publication	Unknown Host Publication
Publisher	IEEE
Pages	1933-1936
Number of pages	4
Volume	4
ISBN (Print)	0-7803-5041-3
DOIs	https://doi.org/10.1109/ICASSP.1999.758303
Publication status	Published (in print/issue) - 1999
Event	1999 IEEE International Conference on Acoustics, Speech, and Signal Processing - Arizona Duration: 1 Jan 1999 → …

Conference

Conference	1999 IEEE International Conference on Acoustics, Speech, and Signal Processing
Period	1/01/99 → …

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10.1109/ICASSP.1999.758303

NovelMappingLinearQRFinal published version, 326 KB

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title = "Novel mapping of a linear QR architecture",

abstract = "This paper presents a novel architecture mapping technique which was essential in the design of a QR array which forms the core processor of a single chip adaptive beamforming system. The mapping technique assigns a QR triangular array of 2m2+3m+1 cells down onto a linear architecture of m+1 processors. The mapping results in a linear systolic architecture with one hundred percent hardware utilisation, local interconnects and individual processors for boundary and internal cell operations. In addition, this paper highlights the effect latency has on the validity of the linear architecture",

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AB - This paper presents a novel architecture mapping technique which was essential in the design of a QR array which forms the core processor of a single chip adaptive beamforming system. The mapping technique assigns a QR triangular array of 2m2+3m+1 cells down onto a linear architecture of m+1 processors. The mapping results in a linear systolic architecture with one hundred percent hardware utilisation, local interconnects and individual processors for boundary and internal cell operations. In addition, this paper highlights the effect latency has on the validity of the linear architecture

U2 - 10.1109/ICASSP.1999.758303

DO - 10.1109/ICASSP.1999.758303

M3 - Conference contribution

SN - 0-7803-5041-3

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SP - 1933

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BT - Unknown Host Publication

PB - IEEE

T2 - 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing

Y2 - 1 January 1999

ER -

Novel mapping of a linear QR architecture

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