Abstract
The paper presents the development of a low-power synthesis flow for the development of dedicated silicon circuits for data-dominated applications such as DSP systems. The work was carried out as part of a European ESPRIT low power action and a collaborative "low-power" project involving the universities of Liverpool Manchester and Sheffield. The design flow is briefly described and some results are presented for multiplier implementations and their use in the development of a discrete cosine transform (DCT) circuit
Original language | English |
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Title of host publication | Unknown Host Publication |
Publisher | Institution of Engineering and Technology |
Pages | 12/1 -12/5 |
Number of pages | 5 |
DOIs | |
Publication status | Published (in print/issue) - 2001 |
Event | IEE Seminar Low Power IC Design - London, UK, 19 Jan. 2001 Duration: 1 Jan 2001 → … |
Conference
Conference | IEE Seminar Low Power IC Design |
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Period | 1/01/01 → … |
Keywords
- Low power
- VLSI
- systolic arrays