Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks

Yuling Luo, Lei Wan, Junxiu Liu, Jim Harkin, LJ McDaid, Yi Cao, Xuemei Ding

Research output: Contribution to journalArticlepeer-review

15 Citations (Scopus)
77 Downloads (Pure)


A novel low cost interconnected architecture (LCIA) is proposed in this paper, which is an efficient solution for the neuron interconnections for the hardware spiking neural networks (SNNs). It is based on an all-to-all connection that takes each paired input and output nodes of multi-layer SNNs as the source and destination of connections. The aim is to maintain an efficient routing performance under low hardware overhead. A Networks-on-Chip (NoC) router is proposed as the fundamental component of the LCIA, where an effective scheduler is designed to address the traffic challenge due to irregular spikes. The router can find requests rapidly, make the arbitration decision promptly, and provide equal services to different network traffic requests. Experimental results show that the LCIA can manage the intercommunication of the multi-layer neural networks efficiently and have a low hardware overhead which can maintain the scalability of hardware SNNs.
Original languageEnglish
Article number857
Pages (from-to)1-14
Number of pages14
JournalFrontiers in Neurosciences
Publication statusPublished (in print/issue) - 21 Nov 2018


  • interconnected architecture
  • Spiking Neural Networks
  • Networks-on-Chip
  • system scalability
  • arbitration scheme


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