Hardware Spiking Neural Network Prototyping and Application

S Cawley; F Morgan; B McGinley; S Pande; Liam McDaid; S Carrillo; Jim Harkin

doi:10.1007/s10710-011-9130-9

Hardware Spiking Neural Network Prototyping and Application

S Cawley
, F Morgan
, B McGinley
, S Pande
, Liam McDaid
, S Carrillo
, Jim Harkin

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	257-280
Journal	Genetic Programming and Evolvable Machines
Volume	12
Issue number	3
DOIs	https://doi.org/10.1007/s10710-011-9130-9
Publication status	Published (in print/issue) - 1 Jul 2011

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10.1007/s10710-011-9130-9

http://www.springerlink.com/content/1389-2576/

Scalable hierarchical networks-on-chip architecture for brain-inspired computing
Carrillo L., S. (Author), Harkin, J. (Supervisor) & McDaid, L. (Supervisor), Jan 2013
Student thesis: Doctoral Thesis

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author = "S Cawley and F Morgan and B McGinley and S Pande and Liam McDaid and S Carrillo and Jim Harkin",

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AU - Cawley, S

AU - Morgan, F

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AU - McDaid, Liam

AU - Carrillo, S

AU - Harkin, Jim

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JO - Genetic Programming and Evolvable Machines

JF - Genetic Programming and Evolvable Machines

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Hardware Spiking Neural Network Prototyping and Application

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Student theses

Scalable hierarchical networks-on-chip architecture for brain-inspired computing

Cite this