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Fixed Latency On-Chip Interconnect for Hardware Spiking Neural Network Architectures

  • S Pande
  • , F Morgan
  • , G Smit
  • , T Bruintjes
  • , B Rutgers
  • , B McGinley
  • , S Cawley
  • , J Harkin
  • , LJ McDaid

Research output: Contribution to journal › Article › peer-review

29   Link opens in a new tab Citations (Scopus)

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