Evaluating the generalisation capability of a CMOS based synapse

Arfan Ghani, Liam McDaid, Ammar Belatreche, Stephen Hall, Shou Huang, John Marsland, Thomas Dowrick, Andy Smith

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

The focus of this work is to investigate the generalisation capability of compact, solid-state synapses recently proposed by the authors. The synapses can be configured to yield a static or dynamic response. Empirical models of the Post Synaptic Response (PSP), derived from hardware simulations, are developed and embedded into the neural network toolbox in MATLAB. A network of these synapses was then used to solve benchmark problems using a well-established training algorithm where the performance metric was convergence time, accuracy and weight range; the Spike Response Model (SRM) was used to implement point neurons. Results are presented and compared with standard synaptic responses.Keywords:CMOS synapses; Spiking neural networks; CMOS implementation of spiking neurons
Original languageEnglish
Pages (from-to)188-197
JournalNeurocomputing
Volume83
DOIs
Publication statusPublished - 15 Apr 2012

Keywords

  • CMOS synapses
  • Spiking neural networks
  • CMOS implementation of spiking neurons

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    Ghani, A., McDaid, L., Belatreche, A., Hall, S., Huang, S., Marsland, J., Dowrick, T., & Smith, A. (2012). Evaluating the generalisation capability of a CMOS based synapse. Neurocomputing, 83, 188-197. https://doi.org/10.1016/j.neucom.2011.12.010