EMBRACE-SysC for Analysis of NoC-based Spiking Neural Network Architectures

Sandeep Pande, Fearghal Morgan, Seamus McCawley, Brian McGinely, Sanider Carrillo, Jim Harkin, Liam McDaid

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

11 Citations (Scopus)


This paper presents EMBRACE-SysC, a simulation-based design exploration framework for the EMBRACE mixed signal Network on Chip (NoC)-based hardware Spiking Neural Network (SNN) architecture. EMBRACE-SysC incorporates Genetic Algorithm-based training of SNN applications. Results illustrate the application of EMBRACE-SysC for performance analysis of a NoC-based SNN architecture. The development of EMBRACE-SysC introduces a powerful design exploration framework for EMBRACE architecture development.
Original languageEnglish
Title of host publicationUnknown Host Publication
Number of pages7
Publication statusPublished (in print/issue) - 28 Sept 2010
EventInternational Symposium on System-on-Chip (SoC) - Finland
Duration: 28 Sept 2010 → …


ConferenceInternational Symposium on System-on-Chip (SoC)
Period28/09/10 → …


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