Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network

M M Manjurul Islam; Cormac McAteer; Girijesh Prasad

doi:10.1109/cai54212.2023.00102

Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network

M M Manjurul Islam, Cormac McAteer, Girijesh Prasad

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

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Abstract

Defect recognition in semiconductor wafers is crucial in manufacturing process to identify the root cause. This paper presents an efficient wafer defects pattern recognition methodology based on deep convolutional neural networks (DCNN) to automate the classification. In DCNN design, we revamped LeNet-5 deep learning model. The proposed DCNN comprises seven layers including three convolutional and two pooling layers. We implemented an adaptive moment (Adam) optimizer to fine-tune model parameters in DCNN. We tested the proposed model on publicly available semiconductor wafers datasets to verify the effectiveness of the model. The experimental study suggests that the proposed model is highly efficient in classifying wafer defects with an accuracy of 99.22% in testing.

Original language	English
Title of host publication	2023 IEEE Conference on Artificial Intelligence (CAI)
Publisher	IEEE
Pages	220-221
Number of pages	2
ISBN (Electronic)	979-8-3503-3984-0
ISBN (Print)	979-8-3503-3985-7
DOIs	https://doi.org/10.1109/cai54212.2023.00102
Publication status	Published online - 2 Aug 2023
Event	2023 IEEE Conference on Artificial Intelligence - Hyatt Regency Santa Clara 5101 Great America Parkway, California, United States Duration: 5 Jun 2023 → 6 Jun 2023 https://cai.ieee.org/2023/

Publication series

Name	Proceedings - 2023 IEEE Conference on Artificial Intelligence, CAI 2023

Conference

Conference	2023 IEEE Conference on Artificial Intelligence
Country/Territory	United States
City	California
Period	5/06/23 → 6/06/23
Internet address	https://cai.ieee.org/2023/

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

Semiconductor wafer
smart manufacturing
pattern recognition
deep learning

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/cai54212.2023.00102

Cite this

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title = "Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network",

abstract = "Defect recognition in semiconductor wafers is crucial in manufacturing process to identify the root cause. This paper presents an efficient wafer defects pattern recognition methodology based on deep convolutional neural networks (DCNN) to automate the classification. In DCNN design, we revamped LeNet-5 deep learning model. The proposed DCNN comprises seven layers including three convolutional and two pooling layers. We implemented an adaptive moment (Adam) optimizer to fine-tune model parameters in DCNN. We tested the proposed model on publicly available semiconductor wafers datasets to verify the effectiveness of the model. The experimental study suggests that the proposed model is highly efficient in classifying wafer defects with an accuracy of 99.22% in testing.",

keywords = "Semiconductor wafer, smart manufacturing, pattern recognition, deep learning",

author = "Islam, {M M Manjurul} and Cormac McAteer and Girijesh Prasad",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 2023 IEEE Conference on Artificial Intelligence ; Conference date: 05-06-2023 Through 06-06-2023",

year = "2023",

month = aug,

day = "2",

doi = "10.1109/cai54212.2023.00102",

language = "English",

isbn = "979-8-3503-3985-7",

series = "Proceedings - 2023 IEEE Conference on Artificial Intelligence, CAI 2023",

publisher = "IEEE",

pages = "220--221",

booktitle = "2023 IEEE Conference on Artificial Intelligence (CAI)",

address = "United States",

url = "https://cai.ieee.org/2023/",

}

Islam, MMM, McAteer, C & Prasad, G 2023, Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network. in 2023 IEEE Conference on Artificial Intelligence (CAI). Proceedings - 2023 IEEE Conference on Artificial Intelligence, CAI 2023, IEEE, pp. 220-221, 2023 IEEE Conference on Artificial Intelligence, California, United States, 5/06/23. https://doi.org/10.1109/cai54212.2023.00102

Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network. / Islam, M M Manjurul; McAteer, Cormac; Prasad, Girijesh.
2023 IEEE Conference on Artificial Intelligence (CAI). IEEE, 2023. p. 220-221 (Proceedings - 2023 IEEE Conference on Artificial Intelligence, CAI 2023).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network

AU - Islam, M M Manjurul

AU - McAteer, Cormac

AU - Prasad, Girijesh

PY - 2023/8/2

Y1 - 2023/8/2

N2 - Defect recognition in semiconductor wafers is crucial in manufacturing process to identify the root cause. This paper presents an efficient wafer defects pattern recognition methodology based on deep convolutional neural networks (DCNN) to automate the classification. In DCNN design, we revamped LeNet-5 deep learning model. The proposed DCNN comprises seven layers including three convolutional and two pooling layers. We implemented an adaptive moment (Adam) optimizer to fine-tune model parameters in DCNN. We tested the proposed model on publicly available semiconductor wafers datasets to verify the effectiveness of the model. The experimental study suggests that the proposed model is highly efficient in classifying wafer defects with an accuracy of 99.22% in testing.

AB - Defect recognition in semiconductor wafers is crucial in manufacturing process to identify the root cause. This paper presents an efficient wafer defects pattern recognition methodology based on deep convolutional neural networks (DCNN) to automate the classification. In DCNN design, we revamped LeNet-5 deep learning model. The proposed DCNN comprises seven layers including three convolutional and two pooling layers. We implemented an adaptive moment (Adam) optimizer to fine-tune model parameters in DCNN. We tested the proposed model on publicly available semiconductor wafers datasets to verify the effectiveness of the model. The experimental study suggests that the proposed model is highly efficient in classifying wafer defects with an accuracy of 99.22% in testing.

KW - Semiconductor wafer

KW - smart manufacturing

KW - pattern recognition

KW - deep learning

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DO - 10.1109/cai54212.2023.00102

M3 - Conference contribution

SN - 979-8-3503-3985-7

T3 - Proceedings - 2023 IEEE Conference on Artificial Intelligence, CAI 2023

SP - 220

EP - 221

BT - 2023 IEEE Conference on Artificial Intelligence (CAI)

PB - IEEE

T2 - 2023 IEEE Conference on Artificial Intelligence

Y2 - 5 June 2023 through 6 June 2023

ER -

Efficient Wafer Defect Patterns Recognition Using Deep Convolutional Neural Network

Abstract

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Bibliographical note

Keywords

UN SDGs

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