Abstract
Driven by economics and design flexibility, an increasing number of applications are dependant on software for primary control functions. This software has traditionally been based around sequential computing systems, but with the ever–increasing demand for performance parallel processing is emerging as an alternative solution. Parallel processing satisfies two major requirements in the design of real–time systems; high performance and high reliability. High performance is gained through multiple processing units, and high reliability results from the ability to separate concerns and introduce fault tolerance in a natural manner. Nevertheless, using parallel processing requires a different approach to design. In particular, problems such as deadlock, livelock and timing analysis are more difficult to detect and analyse for in parallel systems and should be addressed during the design phase. This PhD research has focused on the design of parallel programs which can be guaranteed to meet their temporal constraints. With transputer based occam systems as the target implementation, an investigation has been made into the use of a functional specification language called PAISLey to develop occam programs with determinable timing behaviour.
Original language | English |
---|---|
Title of host publication | Unknown Host Publication |
Publisher | EPSRC |
Pages | 1-14 |
Number of pages | 14 |
Publication status | Published (in print/issue) - 1993 |
Event | SERC/InstMC symposium: Postgraduate Research in Control and Instrumentation - UK Duration: 1 Jan 1993 → … |
Conference
Conference | SERC/InstMC symposium: Postgraduate Research in Control and Instrumentation |
---|---|
Period | 1/01/93 → … |
Keywords
- n/a