Abstract
In Spintronics devices, STT has been widely utilized for magnetization switching. However, its high current requirements and potential barrier layer degradation make it unsuitable for future energy-efficient applications. Similarly, SRAM faces data retention limitations. Voltage-gated spin-orbit Torque has emerged as an advanced Spintronics device, integrating MRAM for enhanced performance, scalability, and energy efficiency to overcome these issues. VGSOT improves by enabling high-speed switching and reducing power. This article analyzes key parameters that optimize switching behaviour, minimize delay, and enhance energy efficiency, establishing VGSOT as a strong candidate for next-generation applications. These parameters include free layer thickness (tsl), metal oxide thickness (tox), MJT surface radius (r), anisotropy energy (Ki). This article explores additional parameters influencing switching behaviour and their impact on device performance. This paper enhances VGSOT energy efficiency by analyzing switching parameters using XOR and XNOR gates. Optimal parameter values are analyzed and displayed in the graph and table
| Original language | English |
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| Title of host publication | VLSI SATA 2025 - 5th IEEE International Conference on VLSI Systems, Architecture, Technology and Applications |
| Publisher | IEEE |
| Pages | 1-6 |
| Number of pages | 6 |
| ISBN (Electronic) | 979-8-3315-0286-7 |
| ISBN (Print) | 979-8-3315-0286-7, 979-8-3315-0287-4 |
| DOIs | |
| Publication status | Published online - 14 Jul 2025 |
| Event | 2025 IEEE 5th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA) - Bangalore, India Duration: 23 May 2025 → 24 May 2025 |
Publication series
| Name | VLSI SATA 2025 - 5th IEEE International Conference on VLSI Systems, Architecture, Technology and Applications |
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Conference
| Conference | 2025 IEEE 5th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA) |
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| Country/Territory | India |
| City | Bangalore |
| Period | 23/05/25 → 24/05/25 |
Bibliographical note
Publisher Copyright:© 2025 IEEE.
Funding
This work was supported by a grant from the Science and Engineering Research Board (SERB), Department of Science and Technology (DST), India (Project Number SUR/2022/003016).
| Funder number |
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| SUR/2022/003016 |
Keywords
- VGSOT
- Spintronics Memory
- spin-Orbit-Torque
- MTJ
- Energy-Efficient Logic
- XOR Gate