An efficient FPGA-based dynamic partial reconfiguration design flow and environment for image and signal processing IP cores

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	377
Journal	Signal Processing: Image Communication
Volume	25
Issue number	5
DOIs	https://doi.org/10.1016/j.image.2010.04.005
Publication status	Published (in print/issue) - 2010

Access to Document

@article{c6c432bc94464ac7838e9705d901b927,

title = "An efficient FPGA-based dynamic partial reconfiguration design flow and environment for image and signal processing IP cores",

author = "B Krill and A Ahmad and A Amira and H Rabah",

year = "2010",

doi = "10.1016/j.image.2010.04.005",

language = "English",

volume = "25",

pages = "377",

journal = "Signal Processing: Image Communication",

publisher = "Elsevier BV",

number = "5",

}

TY - JOUR

T1 - An efficient FPGA-based dynamic partial reconfiguration design flow and environment for image and signal processing IP cores

AU - Krill, B

AU - Ahmad, A

AU - Amira, A

AU - Rabah, H

PY - 2010

Y1 - 2010

U2 - 10.1016/j.image.2010.04.005

DO - 10.1016/j.image.2010.04.005

M3 - Article

VL - 25

SP - 377

JO - Signal Processing: Image Communication

JF - Signal Processing: Image Communication

IS - 5

ER -