A Design Flow for the Hardware Implementation of Spiking Neural Networks onto FPGAs

S Johnston, G Prasad, LP Maguire, TM McGinnity, Q Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Spiking neural networks (SNN) are biological more plausible models that use spikes as the means of temporal and spatial coding of information. The problem arises in that large numbers of these neurons communicating in parallel with real time requirements are necessary for cutting edge sensory applications. This requires that new hardware or software techniques have to be developed. Here a novel codesign is presented incorporating the benefits of state-of-the-art field programmable gate array (FPGA) technology aided with a software system employing a visual data flow environment to create a rapid flexible platform for the simulation and implementation of SNN.
LanguageEnglish
Title of host publicationUnknown Host Publication
Pages124-129
Number of pages6
Publication statusPublished - Sep 2003
EventIEEE Cybernetics Intelligence - Challenges and Advances (CICA) 2003 - Reading, UK
Duration: 1 Sep 2003 → …

Conference

ConferenceIEEE Cybernetics Intelligence - Challenges and Advances (CICA) 2003
Period1/09/03 → …

Fingerprint

Field programmable gate arrays (FPGA)
Neural networks
Hardware
Neurons

Cite this

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title = "A Design Flow for the Hardware Implementation of Spiking Neural Networks onto FPGAs",
abstract = "Spiking neural networks (SNN) are biological more plausible models that use spikes as the means of temporal and spatial coding of information. The problem arises in that large numbers of these neurons communicating in parallel with real time requirements are necessary for cutting edge sensory applications. This requires that new hardware or software techniques have to be developed. Here a novel codesign is presented incorporating the benefits of state-of-the-art field programmable gate array (FPGA) technology aided with a software system employing a visual data flow environment to create a rapid flexible platform for the simulation and implementation of SNN.",
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Johnston, S, Prasad, G, Maguire, LP, McGinnity, TM & Wu, Q 2003, A Design Flow for the Hardware Implementation of Spiking Neural Networks onto FPGAs. in Unknown Host Publication. pp. 124-129, IEEE Cybernetics Intelligence - Challenges and Advances (CICA) 2003, 1/09/03.

A Design Flow for the Hardware Implementation of Spiking Neural Networks onto FPGAs. / Johnston, S; Prasad, G; Maguire, LP; McGinnity, TM; Wu, Q.

Unknown Host Publication. 2003. p. 124-129.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

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N2 - Spiking neural networks (SNN) are biological more plausible models that use spikes as the means of temporal and spatial coding of information. The problem arises in that large numbers of these neurons communicating in parallel with real time requirements are necessary for cutting edge sensory applications. This requires that new hardware or software techniques have to be developed. Here a novel codesign is presented incorporating the benefits of state-of-the-art field programmable gate array (FPGA) technology aided with a software system employing a visual data flow environment to create a rapid flexible platform for the simulation and implementation of SNN.

AB - Spiking neural networks (SNN) are biological more plausible models that use spikes as the means of temporal and spatial coding of information. The problem arises in that large numbers of these neurons communicating in parallel with real time requirements are necessary for cutting edge sensory applications. This requires that new hardware or software techniques have to be developed. Here a novel codesign is presented incorporating the benefits of state-of-the-art field programmable gate array (FPGA) technology aided with a software system employing a visual data flow environment to create a rapid flexible platform for the simulation and implementation of SNN.

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BT - Unknown Host Publication

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