Photo of Bogaraju Sharatchandra Varma
  • Phone+442890366190
  • Shore Road, Jordanstown Campus

    BT37 0QB Newtownabbey

    United Kingdom

  • 50 Citations
  • 5 h-Index
20132018

Research output per year

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Research Output

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Conference contribution
2018

The VINEYARD Integrated Framework for Hardware Accelerators in the Cloud

Kachris, C., Soudris, D., Mavridis, S., Pavlidakis, M., Symeonidou, C., Kozanitis, C., Bilas, A., Fenacci, D., Bogaraju, S. V., Vandierendonck, H. & Nikolopoulos, D. S., 15 Jul 2018, Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. New York, NY, USA: Association for Computing Machinery, p. 236-243 8 p. (SAMOS '18).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2017

High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform

Ng, H. C., Wang, M., Chung, B. M. F., Varma, B. S. C., Jaiswal, M. K., Ho, S. M. H., Tsia, K. K., Shum, H. C. & So, H. K. H., 16 Feb 2017, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). p. 1-6 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
2016

High-throughput microparticle screening by 1micro m time-stretch optofluidic imaging integrated with a field-programmable gate array platform

Chung, B. M. F., Ng, H. C., Wang, M., Bogaraju, S. C. V., Shum, A. H. C., So, H. K. H. & Tsia, K. K., 6 Jun 2016, Conference on Lasers and Electro-Optics, OSA Technical Digest (2016). p. 1-2 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2015

Architecture for dual-mode quadruple precision floating point adder

Jaiswal, M. K., Varma, B. S. C. & So, H. K-H., 2015, IEEE Computer Society Annual Symposium on VLSI.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2014

Accelerating Genome Assembly Using Hard Embedded Blocks in FPGAs

Varma, B. S. C., Paul, K. & Balakrishnan, M., 1 Jan 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems. IEEE Xplore, p. 306-311 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

High Level Design Approach to Accelerate De Novo Genome Assembly Using FPGAs

Varma, B. S. C., Paul, K. & Balakrishnan, M., 1 Aug 2014, 2014 17th Euromicro Conference on Digital System Design. IEEE Xplore, p. 66-73 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
2013

Accelerating 3D-FFT Using Hard Embedded Blocks in FPGAs

Varma, B. S. C., Paul, K. & Balakrishnan, M., 1 Jan 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems. IEEE Xplore, p. 92-97 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

FAssem: FPGA Based Acceleration of De Novo Genome Assembly

Varma, B. S. C., Paul, K., Balakrishnan, M., Lavenier, D. & B, S. C. V., 1 Apr 2013, 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines. p. 173-176 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Citations (Scopus)