Photo of Bogaraju Sharatchandra Varma
  • Phone+442890366190
  • Shore Road, Jordanstown Campus

    BT37 0QB Newtownabbey

    United Kingdom

  • 50 Citations
  • 5 h-Index
20132018

Research output per year

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Research Output

Article

All-passive pixel super-resolution of time-stretch imaging

Chan, A. C. S., Ng, H-C., B, S. C. V., So, H. K-H., Lam, E. Y. & Tsia, K. K., 17 Mar 2017, In : Scientific Reports. 7, p. 1-11 11 p., 44608 .

Research output: Contribution to journalArticle

Open Access
File
9 Citations (Scopus)
1 Downloads (Pure)

Configurable architectures for multi-mode floating point adders

Jaiswal, M. K., Varma, B. S. C., So, H. K-H., Balakrishnan, M., Paul, K. & Cheung, R. CC., Aug 2015, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 62, 8, p. 2079-2090 12 p.

Research output: Contribution to journalArticle

5 Citations (Scopus)

Hardware acceleration of de novo genome assembly

Varma, B. S. C., Paul, K., M, B. & Lavenier, D., 21 Jan 2017, In : International Journal of Embedded Systems. 9, 1, p. 74-89 16 p.

Research output: Contribution to journalArticle

Open Access
File
8 Downloads (Pure)
Book

Architecture exploration of FPGA based accelerators for BioInformatics applications

B, S. C. V., Paul, K. & Balakrishnan, M., 11 Apr 2016, Springer. 122 p. (Springer Series in Advanced Microelectronics; vol. 55)

Research output: Book/ReportBook

Chapter

FPGA-Based Acceleration of Protein Docking

Varma, B. S. C., Paul, K. & Balakrishnan, M., 3 Mar 2016, Architecture Exploration of FPGA Based Accelerators for BioInformatics Applications. Springer, p. 39-54 16 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

Methodology for Implementing Accelerators

Varma, B. S. C., Paul, K. & Balakrishnan, M., 3 Mar 2016, Architecture Exploration of FPGA Based Accelerators for BioInformatics Applications. Springer, p. 29-38 10 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

System-Level Design Space Exploration

Varma, B. S. C., Paul, K. & Balakrishnan, M., 3 Mar 2016, Architecture Exploration of FPGA Based Accelerators for BioInformatics Applications. Springer, Vol. 55. p. 101-116 16 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

Conference contribution

Accelerating 3D-FFT Using Hard Embedded Blocks in FPGAs

Varma, B. S. C., Paul, K. & Balakrishnan, M., 1 Jan 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems. IEEE Xplore, p. 92-97 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Accelerating Genome Assembly Using Hard Embedded Blocks in FPGAs

Varma, B. S. C., Paul, K. & Balakrishnan, M., 1 Jan 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems. IEEE Xplore, p. 306-311 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Architecture for dual-mode quadruple precision floating point adder

Jaiswal, M. K., Varma, B. S. C. & So, H. K-H., 2015, IEEE Computer Society Annual Symposium on VLSI.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

FAssem: FPGA Based Acceleration of De Novo Genome Assembly

Varma, B. S. C., Paul, K., Balakrishnan, M., Lavenier, D. & B, S. C. V., 1 Apr 2013, 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines. p. 173-176 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Citations (Scopus)

High Level Design Approach to Accelerate De Novo Genome Assembly Using FPGAs

Varma, B. S. C., Paul, K. & Balakrishnan, M., 1 Aug 2014, 2014 17th Euromicro Conference on Digital System Design. IEEE Xplore, p. 66-73 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform

Ng, H. C., Wang, M., Chung, B. M. F., Varma, B. S. C., Jaiswal, M. K., Ho, S. M. H., Tsia, K. K., Shum, H. C. & So, H. K. H., 16 Feb 2017, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). p. 1-6 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

High-throughput microparticle screening by 1micro m time-stretch optofluidic imaging integrated with a field-programmable gate array platform

Chung, B. M. F., Ng, H. C., Wang, M., Bogaraju, S. C. V., Shum, A. H. C., So, H. K. H. & Tsia, K. K., 6 Jun 2016, Conference on Lasers and Electro-Optics, OSA Technical Digest (2016). p. 1-2 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

The VINEYARD Integrated Framework for Hardware Accelerators in the Cloud

Kachris, C., Soudris, D., Mavridis, S., Pavlidakis, M., Symeonidou, C., Kozanitis, C., Bilas, A., Fenacci, D., Bogaraju, S. V., Vandierendonck, H. & Nikolopoulos, D. S., 15 Jul 2018, Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. New York, NY, USA: Association for Computing Machinery, p. 236-243 8 p. (SAMOS '18).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Paper

Real-time object detection and classification for high-speed asymmetric-detection time-stretch optical microscopy on FPGA

Wang, M., Ng, H-C., Chung, B. MF., Varma, B. S. C., Jaiswal, M. K., Tsia, K. K., Shum, H. C. & So, H. K-H., 18 May 2017, p. 261-264. 4 p.

Research output: Contribution to conferencePaper

2 Citations (Scopus)